Title :
Panel: Functional Verification Planning and Management - Are Good Intentions Good Enough?
Keywords :
Computer bugs; Costs; Hardware; Job design; Job shop scheduling; Monitoring; Process design; Testing; Time to market; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 2009. VTS '09. 27th IEEE
Conference_Location :
Santa Cruz, CA, USA
Print_ISBN :
978-0-7695-3598-2
DOI :
10.1109/VTS.2009.66
