DocumentCode :
2244320
Title :
Efficient approaches to improving performance of VLSI SOVA-based turbo decoders
Author :
Wang, Zhongfeng ; Suzuki, Hiroshi ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume :
1
fYear :
2000
fDate :
2000
Firstpage :
287
Abstract :
In this paper, we propose two VLSI applicable approaches to improving performance of soft-output Viterbi algorithm (SOVA)-based turbo decoders. In the first approach, a pseudo-median filter is employed to modify the soft outputs of each SOVA-based constituent decoder. Compared with conventional SOVA-based turbo decoders, an extra coding gain of 0.2 dB can be achieved for a wide range of target bit-error-rate (BER). In the second approach, an easily obtainable variable and a simple mapping function are used to avoid the complex computation of the scaling factor for extrinsic information in SOVA-based turbo decoders. An extra coding gain of 0.3 to 0.5 dB can be obtained in general. This approach does not require signal-to-noise ratio (SNR) related information while the original method does. The hardware overhead and the extra latency for both approaches are negligible
Keywords :
VLSI; Viterbi decoding; digital signal processing chips; error statistics; median filters; turbo codes; BER; DSP chip; VLSI SOVA-based turbo decoders; bit-error-rate; mapping function; pseudo-median filter; soft-output Viterbi algorithm; Decoding; Delay; Filters; Gain; Hardware; Large scale integration; Steel; Turbo codes; Very large scale integration; Viterbi algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
Type :
conf
DOI :
10.1109/ISCAS.2000.857086
Filename :
857086
Link To Document :
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