DocumentCode
2245200
Title
A packet filtering mechanism with a packet delay distribution estimation function for IEEE 1588 time synchronization in a congested network
Author
Murakami, Takahide ; Horiuchi, Yukio ; Nishimura, Kosuke
Author_Institution
KDDI R&D Labs. Inc., Fujimino, Japan
fYear
2011
fDate
12-16 Sept. 2011
Firstpage
114
Lastpage
119
Abstract
This paper presents a packet filtering mechanism by using packet delay distribution estimation for improving the clock stability of time synchronization with IEEE 1588. We study a packet delay distribution estimation method by using a dedicated probing packet, and discuss the applicability of the estimation method for the clock control mechanism in IEEE 1588 slave nodes. Numerical simulations show that the packet delay distribution estimation method is effective for packet filtering in heavily congested networks.
Keywords
clocks; protocols; synchronisation; IEEE 1588 time synchronization; clock control mechanism; clock stability; congested network; dedicated probing packet; packet delay distribution estimation function; packet filtering; Clocks; Delay; Estimation; Filtering; Jitter; Synchronization; Telecommunication traffic; IEEE 1588 precision time protocol (PTP); packet delay variation (PDV); packet filtering; probing packet; queuing delay;
fLanguage
English
Publisher
ieee
Conference_Titel
Precision Clock Synchronization for Measurement Control and Communication (ISPCS), 2011 International IEEE Symposium on
Conference_Location
Munich
ISSN
1949-0305
Print_ISBN
978-1-61284-893-8
Type
conf
DOI
10.1109/ISPCS.2011.6070159
Filename
6070159
Link To Document