DocumentCode
2245207
Title
A self-testing systolic module for VLSI DSP applications
Author
Gupta, Shantanu R. ; Bayoumi, Magdy A.
Author_Institution
Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
fYear
1988
fDate
7-9 June 1988
Firstpage
1517
Abstract
The authors propose a novel concurrent error-detection scheme for error detection in VLSI arrays. The proposed scheme is called LOED (logarithm-based online error detection) and is based on the use of logarithmic coding. This scheme is analyzed and its implementation details are described. Fault coverage and hardware overhead of the scheme are also discussed. The application of LOED to the convolution problem is described, and the advantages of LOED are enumerated.<>
Keywords
VLSI; automatic testing; computerised signal processing; digital signal processing chips; error detection; integrated logic circuits; LOED; VLSI DSP applications; VLSI arrays; concurrent error-detection scheme; convolution problem; digital signal processing; fault coverage; hardware overhead; logarithm-based online error detection; logarithmic coding; self-testing systolic module; Application software; Built-in self-test; Convolution; Digital signal processing; Fault detection; Image coding; Pattern recognition; Systolic arrays; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.15218
Filename
15218
Link To Document