DocumentCode :
2247891
Title :
Frequency Synthesizer for Wireless Applications using TDTL
Author :
Al-Humaidan, Abdulrahman ; Al-Araji, Saleh R. ; Al-Qutayri, Mahmoud
Author_Institution :
Etisalat Univ. Coll., Shariah
fYear :
2006
fDate :
4-7 Dec. 2006
Firstpage :
1516
Lastpage :
1519
Abstract :
A frequency synthesizer using a first-order time delay tanlock loop (TDTL) is proposed in this work. The synthesizer involves introducing an integer divider within the structure of the TDTL in order to produce multiple frequencies from one reference source, which in the case of the TDTL is the digital controlled oscillator (DCO). An adaptive mechanism was embedded into the loop to compensate for the errors and changes the divider cause when it is introduced within the loop for different division factors
Keywords :
delay circuits; dividing circuits; frequency synthesizers; oscillators; DCO; TDTL; adaptive mechanism; digital controlled oscillator; frequency synthesizer; integer divider; time delay tanlock loop; wireless applications; Circuits; Delay effects; Digital control; Digital-controlled oscillators; Educational institutions; Equations; Frequency conversion; Frequency synthesizers; Sampling methods; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
Type :
conf
DOI :
10.1109/APCCAS.2006.342511
Filename :
4145692
Link To Document :
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