DocumentCode :
2250750
Title :
Design of a real time image compression system using multiple DSP 56000/96000 processors
Author :
Srinivasan, S. ; Monie, Elwin Chandra ; Prasad, G. Vijaya Krishna
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Madras, India
fYear :
1993
fDate :
1-3 Nov 1993
Firstpage :
1632
Abstract :
An image compression system has been implemented using DSP 56000/96000 family of processors. Block processing is done on image data of 8×8 size to reduce I/O overheads. The coding scheme uses Discrete Cosine Transform (DCT) followed by a Llyod-Max quantizer. A multiprocessor system using these processors has also been designed for compression of 512×512 images in real time
Keywords :
analogue-digital conversion; data compression; digital signal processing chips; discrete cosine transforms; image coding; multiprocessing systems; DSP 56000 processor; DSP 96000 processor; I/O overheads; Llyod-Max quantizer; block processing; discrete cosine transform; image coding; image data; multiprocessor system; real time image compression system; Bit rate; Decoding; Digital signal processing; Digital signal processing chips; Discrete cosine transforms; Image coding; Image processing; Image reconstruction; Image storage; Multiprocessing systems; Real time systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 1993. 1993 Conference Record of The Twenty-Seventh Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
0-8186-4120-7
Type :
conf
DOI :
10.1109/ACSSC.1993.342338
Filename :
342338
Link To Document :
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