Title :
GLMC: interconnect length estimation by growth-limited multifold clustering
Author :
Alvandpour, Atila ; Larsson-Edefors, Per ; Svensson, Christer
Author_Institution :
Circuit Res. Lab., Intel Corp., Hillsboro, OR, USA
Abstract :
In this paper, interconnection length estimation is discussed and a general, simple, fast and efficient estimation technique is proposed. In contrast to traditional average length estimation techniques, such as the one based on Rent´s rule, the new technique utilizes the topological information of the actual netlist and estimates the length of each interconnection separately. The result of the estimation can be directly used to assign a reasonable R and C to each interconnect, including long and wide buses. Consequently, the new technique enhances the accuracy of power and delay estimations at higher design levels of abstraction
Keywords :
circuit layout CAD; delay estimation; estimation theory; integrated circuit interconnections; integrated circuit layout; matrix algebra; parameter estimation; GLMC technique; IC design; IC layout; RC properties; delay estimation; fast estimation technique; growth-limited multifold clustering; interconnect length estimation algorithm; netlist topological information; power estimation; Circuit noise; Clustering algorithms; Delay estimation; Information analysis; Integrated circuit interconnections; Optimization; Physics; Pins; Very large scale integration; Wire;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.857472