Design of an iterative receiver for linearly precoded MIMO systems

Author

Karakolah, Daoud ; Jégo, Christophe ; Langlais, Charlotte ; Jézéquel, Michel

Author_Institution

Electron. Eng. Dept., Univ. Europeenne de Bretagne, Brest, France

fYear

2009

fDate

24-27 May 2009

Firstpage

597

Lastpage

600

Abstract

This paper presents an architecture design and implementation of an iterative receiver for linearly precoded MIMO systems. The receiver is composed of two main elements: an MMSE-IC equalizer and a 64-state MAX-LOG-MAP decoder which exchange soft information through an interleaving scheme. Each block of the architecture was designed to reach a trade off between complexity and error rate performance. Our objective is to validate the potential of iterative receiver as practical and competitive solution for linearly precoded MIMO systems.

Keywords

MIMO communication; equalisers; iterative methods; least mean squares methods; precoding; radio receivers; 64-state MAX-LOG-MAP decoder; MMSE-IC equalizer; iterative receiver; linearly precoded MIMO systems; multiple-input multiple-output systems; Detectors; Equalizers; Error analysis; Field programmable gate arrays; Hardware; Interference; Interleaved codes; Iterative decoding; MIMO; Telecommunications;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5117819

Filename

5117819