DocumentCode :
2254070
Title :
A self-biased low voltage, low power, CMOS transconductor stage
Author :
Fedeli, Michele ; Vacchi, Carla
Author_Institution :
Dipartimento di Elettronica, Pavia Univ., Italy
Volume :
5
fYear :
2000
fDate :
2000
Firstpage :
649
Abstract :
A self-biased CMOS transconductor stage, able to work with a low-voltage supply and low-power dissipation, is proposed. A fully differential configuration in a 0.25 μm minimum lithography technology has been utilized to design the circuit. Paying particular attention to the mismatch problems, a correct sizing of the circuit has been made. With a voltage supply of 1.2 V, the power consumption is 200 μW and the gain bandwidth product is equal to 30 MHz. Utilizing the transconductor proposed here, a biquadratic cell has been simulated: imposing a central frequency of 1 MHz, the filter reaches 1% of THD with 275 mV peak differential sinusoidal input signal, while the total input noise is about 190 μVr.m.s.. With a power consumption of 1 mW, the cell presents a dynamic range of 60 dB and a SNDR peak of 48.6 dB
Keywords :
CMOS analogue integrated circuits; active networks; biquadratic filters; continuous time filters; equivalent circuits; low-power electronics; 0.25 micron; 1 MHz; 1 mW; 1.2 V; 200 muW; 30 MHz; 48.6 dB; CMOS transconductor stage; active filter application; bias generator; biquadratic cell; fully differential configuration; low power operation; low voltage operation; low-power dissipation; mismatch problems; self-biased transconductor stage; Bandwidth; CMOS technology; Circuit simulation; Dynamic range; Energy consumption; Filters; Frequency; Lithography; Low voltage; Transconductors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
Type :
conf
DOI :
10.1109/ISCAS.2000.857546
Filename :
857546
Link To Document :
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