• DocumentCode
    2256015
  • Title

    Schottky barrier MOSFETs for silicon nanoelectronics

  • Author

    Tucker, J.R.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Beckman Inst., Urbana, IL, USA
  • fYear
    1997
  • fDate
    6-11 Jan 1997
  • Firstpage
    97
  • Lastpage
    100
  • Abstract
    Metal silicide source/drain MOSFETs may provide a simple route to terabit integrated circuits with ~25 nm gate length and ~100 nm overall device size. Potential advantages of this approach are outlined here along with recent progress
  • Keywords
    MOS integrated circuits; MOSFET; Schottky barriers; elemental semiconductors; nanotechnology; silicon; 100 nm; 25 nm; Schottky barrier MOSFETs; Si; device size; gate length; metal silicide source/drain devices; nanoelectronics; terabit integrated circuits; Carrier confinement; Doping; Electrodes; MOSFETs; Nanoelectronics; P-n junctions; Schottky barriers; Silicides; Silicon; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Frontiers in Electronics, 1997. WOFE '97. Proceedings., 1997 Advanced Workshop on
  • Conference_Location
    Puerto de la Cruz
  • Print_ISBN
    0-7803-4059-0
  • Type

    conf

  • DOI
    10.1109/WOFE.1997.621159
  • Filename
    621159
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2256015