Resistive-open defects in embedded-SRAM core cells: analysis and march test solution

In this paper we present an exhaustive analysis of resistive-open defect in core-cell of SRAM memories. These defects that appear more frequently in VDSM technologies induce a modification of the timing within the memory (delay faults). Among the faults induce by such resistive-open defects there are static and dynamic read destructive fault (RDF), deceptive read destructive fault (DRDF), incorrect read fault (IRF) and transition fault (TF). Each of them requires specific test conditions and different kind of March tests are needed to cover all these faults (TF, RDF, DRDF and IRF). In this paper, we show that a unique March test solution can ensure the complete coverage of all the faults induced by the resistive-open defects in the SRAM core-cells. This solution simplifies considerably the problem of delay fault testing in this part of SRAM memories.