A high-speed real-time digital pulse compression system based on TMS320C6201

Author

Fanghui, Li ; Teng, Long

Author_Institution

Dept. E.E., Beijing Inst. of Technol., China

fYear

2001

fDate

2001

Firstpage

557

Lastpage

561

Abstract

The linear frequency-modulated pulse is one of the most important large time-bandwidth product signals, which demands large calculations for digital processing. In this paper, methods to improve the parallelism of FFT calculation in a VLIW architecture processor are studied, and a modified fixed-point FFT algorithm is promoted to meet the need of computation speed and accuracy. Then a high-speed real-time digital pulse compression system based on the TMS320C6201 is realized, it can implement DPC processing within 124 μs, which is very close to the top performance of the TMS320C6201. The whole system has been applied in some radars and proved stable and reliable

Keywords

digital signal processing chips; fast Fourier transforms; fixed point arithmetic; frequency modulation; parallel architectures; pulse compression; radar signal processing; real-time systems; DPC processing; FFT calculation parallelism; TMS320C6201; VLIW architecture processor; computation accuracy; computation speed; digital processing; digital signal processor; high-speed pulse compression; linear frequency-modulated pulse; modified fixed-point FFT algorithm; radar systems; real-time digital pulse compression system; time-bandwidth product signals; Computer aided instruction; Computer architecture; Concurrent computing; Frequency; Parallel processing; Pulse compression methods; Radar; Real time systems; Signal processing algorithms; VLIW;

fLanguage

English

Publisher

ieee

Conference_Titel

Radar, 2001 CIE International Conference on, Proceedings

Conference_Location

Beijing

Print_ISBN

0-7803-7000-7

Type

conf

DOI

10.1109/ICR.2001.984777

Filename

984777