DocumentCode :
2263983
Title :
Sigma-delta analog to LPC feature converters for portable recognition interfaces
Author :
Chakrabartty, Shantanu ; Gore, Amit
Author_Institution :
Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA
fYear :
2009
fDate :
24-27 May 2009
Firstpage :
2673
Lastpage :
2676
Abstract :
For many recognition systems, the feature extraction unit forms the most computationally intensive and power consuming component. In this paper, we present a design of an analog-to-information converter that directly produces a pulse-encoded representation of linear predictive coded (LPC) features corresponding to an input analog signal. At the core of proposed design is a sigma-delta modulation procedure that is embedded within a learning step. Measured results from a fabricated prototype in a 0.5 mum CMOS technology demonstrate the real-time functionality of the learner in extracting 6-dimensional online LPC features from input speech signal while consuming only 450 muW.
Keywords :
CMOS integrated circuits; convertors; feature extraction; linear predictive coding; sigma-delta modulation; CMOS technology; analog-to-information converter; feature extraction unit forms; input analog signal; linear predictive coded features; portable recognition interfaces; power 450 muW; power consuming component; pulse-encoded representation; sigma-delta analog-LPC feature converters; size 0.5 mum; speech signal; Analog computers; CMOS technology; Circuit testing; Computer interfaces; Delta-sigma modulation; Feature extraction; Linear predictive coding; Portable computers; Prototypes; Speech recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
Type :
conf
DOI :
10.1109/ISCAS.2009.5118352
Filename :
5118352
Link To Document :
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