GOI improvement in analog CMOS split gate process

We investigated how wafer charging before gate oxide clean impacted on GOI (Gate Oxide Integrity) in Analog CMOS split gate (dual gate) process. This wafer charging was caused by the develop rinse step of split gate pattern process, and it caused GOI degradation during dilute HF dipping for gate oxide over electrically isolated structure from the substrate. We found that light illumination with sufficient intensity during HF dipping was effective in GOI improvement. This action played a role of surface charge compensation. Experimental results for oxide etching rate, effective illumination period, and initial oxide thickness dependency are shown.