Evaluation of Simple/Comparative Power Analysis against an RSA ASIC implementation

Author

Miyamoto, Atsushi ; Homma, Naofumi ; Aoki, Takafumi ; Satoh, Akashi

Author_Institution

Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan

fYear

2009

fDate

24-27 May 2009

Firstpage

2918

Lastpage

2921

Abstract

Simple power analysis attacks with chosen-message techniques were applied to an RSA processor implemented with standard CMOS technology on ASIC, and the different characteristics of power waveforms caused by two types of implementation (ASIC and FPGA) were investigated in detail. We also applied comparative power analysis an advanced power analysis attack in which a pair of input data was used to enhance the waveform pattern for modular exponentiation. The power dissipation of modular squaring in the difference waveform was greatly reduced when compared to modular multiplication, allowing all of the secret key bits to be successfully revealed.

Keywords

CMOS integrated circuits; application specific integrated circuits; field programmable gate arrays; public key cryptography; CMOS technology; FPGA; RSA ASIC implementation; modular exponentiation; simple-comparative power analysis; waveform pattern; Algorithm design and analysis; Application specific integrated circuits; CMOS process; CMOS technology; Electromagnetic radiation; Field programmable gate arrays; Information analysis; Pattern analysis; Power dissipation; Public key cryptography;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5118413

Filename

5118413