Title :
Fault tolerance properties of mesh-connected parallel computers with separable row/column buses
Author :
Parhami, Behrooz
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
Abstract :
A two-dimensional processor array with separable row/column buses that are logically divisible into a number of local buses has proven quite effective for a wide class of parallel computations. The author shows how these separable buses, originally proposed for improved performance, can also be used to achieve tolerance to processor and link failures with minimal overhead for certain applications
Keywords :
fault tolerant computing; parallel architectures; reconfigurable architectures; fault tolerance properties; link failures; local buses; mesh-connected parallel computers; processor failures; separable row/column buses; two-dimensional processor array; Algorithm design and analysis; Application software; Broadcasting; Concurrent computing; Fault tolerance; Grid computing; Logic arrays; Parallel processing; Routing; Switches;
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
DOI :
10.1109/MWSCAS.1993.343286
