VLSI implementation of variable resolution image compression

Author

Sahabi, Hossein ; Basu, Anup ; Fiala, Mark

Author_Institution

Dept. of Comput. Sci., Alberta Univ., Edmonton, Alta., Canada

fYear

1995

fDate

4-7 Jan 1995

Firstpage

214

Lastpage

219

Abstract

Variable Resolution (VR) compression of images is a new compression technique which has been developed based on the characteristics of the human eye. VR compression reduces the bandwith requirements in telepresence and teleconferencing systems. In order to perform this type of compression in real-time, a special purpose hardware is required. We describe the design of a VR Encoding/Decoding subsystem, which as designed to be interfaced, to SBus (Sun SPARC machines system Bus). The main component of this hardware unit is a VR Coder/Decoder (CODEC) VLSI chip which supports real time VR compression and decompression of up to 1024×1024 pixels at video rates. Some experimental results regarding VR compression and the quality of output images in a prototype teleconferencing system are provided

Keywords

VLSI; codecs; data compression; digital signal processing chips; image coding; image resolution; real-time systems; teleconferencing; video codecs; video signal processing; 1024 pixel; 1048576 pixel; SBus interface; VLSI codec chip; VLSI implementation; bandwith requirements; encoding/decoding subsystem; output image quality; real time compression; real time decompression; teleconferencing systems; telepresence system; variable resolution image compression; video rates; Decoding; Hardware; Humans; Image coding; Image resolution; Sun; System buses; Teleconferencing; Very large scale integration; Virtual reality;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 1995., Proceedings of the 8th International Conference on

Conference_Location

New Delhi

ISSN

1063-9667

Print_ISBN

0-8186-6905-5

Type

conf

DOI

10.1109/ICVD.1995.512111

Filename

512111