Simulation of interface state generation effects in LDD MOSFET´s

Author

Wang, Tahui ; Huang, Chimoon ; Chou, Peng-Cheng ; Chung, Steve S.

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

1994

fDate

5-6 Jun 1994

Firstpage

23

Lastpage

26

Abstract

A two-dimensional numerical simulation including a new interface state generation model has been developed to study the performance variation of an LDD MOSFET after hot carrier stress. The spatial distribution of interface states is calculated with a combined Monte Carlo and breaking silicon-hydrogen bond model. A 0.6 μm LDD MOSFET was characterized to compare the simulation. A reduction of the substrate current at V_g≅0.5 V_d in a stressed device was observed from both measurement and simulation. Our study reveals that the reduction is attributed to a distance between the maximum channel electric field and the generated interface states

Keywords

MOSFET; Monte Carlo methods; electron traps; hot carriers; interface states; semiconductor device models; 0.6 micron; LDD MOSFETs; Monte Carlo model; breaking silicon-hydrogen bond model; device measurement; hot carrier stress; interface state generation effects; maximum channel electric field; performance variation; spatial distribution; substrate current; two-dimensional numerical simulation; Bonding; Current measurement; DC generators; Degradation; Electrons; Hot carriers; Interface states; MOSFET circuits; Numerical simulation; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Numerical Modeling of Processes and Devices for Integrated Circuits, 1994. NUPAD V., International Workshop on

Conference_Location

Honolulu, HI

Print_ISBN

0-7803-1867-6

Type

conf

DOI

10.1109/NUPAD.1994.343499

Filename

343499