Simulation of amplified gate-induced-drain-leakage (GIDL) in short-channel SOI MOSFETs

Amplification of gate-induced-drain-leakage current has been reported for short channel MOS-transistors on SOI substrate. Here, we show that this effect is reproduced consistently by 2D-device simulation when a band-to-band tunneling model is included. Making use of this simulation model, we investigate the behavior of the off-state leakage current when MOSFET channel length is scaled down. The results of this simulation study show that for proper scaling of device dimensions and supply voltage, drain leakage current due to amplified GIDL does not increase for future generations of SOI-CMOS transistors