DocumentCode
2270645
Title
Techniques for low energy software
Author
Mehta, Huzefa ; Owens, Robert Michael ; Irwin, Mary Jane ; Chen, Rita ; Ghosh, Debashree
Author_Institution
Equator Technol., Campbell, CA, USA
fYear
1997
fDate
18-20 Aug. 1997
Firstpage
72
Lastpage
75
Abstract
The energy consumption of a system depends upon the hardware and software component of a system. Since it is the software which drives the hardware in most systems, decisions taken during software design has significant impact on the energy consumption of the processor. The paper focuses on decreasing energy consumption of a processor using software techniques. A novel compiler technique is proposed which reduces energy consumption by proper register labeling during the compilation phase. The idea behind this technique is to reduce the energy of the processor by reducing the energy of the instruction register (also the instruction data bus) and the register file decoder by encoding the register labels such that the sum of the switching costs between all the register labels in the transition graph is minimized. There is no hardware penalty since this is purely a compiler optimization. Results on benchmarks show that the energy consumption of the DLX processor can be reduced by 9.82% (maximum) and 4.25% (average) (as measured by DLX energy simulator). In addition several compiler techniques such as loop unrolling, software pipelining, recursion elimination and of effects of different algorithms on power and energy consumption are studied. This evaluation methodology is useful for computer architects to evaluate energy improvements of their hardware, compiler writers to evaluate energy of the compiled code and program writers to evaluate energy of data structures and algorithms.
Keywords
microprocessor chips; program compilers; software engineering; DLX processor; algorithm; compiler optimization; energy consumption; energy simulator; instruction data bus; instruction register; loop unrolling; low energy software; power consumption; recursion elimination; register file decoder; register label encoding; software design; software pipelining; switching cost; transition graph; Costs; Decoding; Encoding; Energy consumption; Energy measurement; Hardware; Labeling; Optimizing compilers; Registers; Software design;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location
Monterey, CA, USA
Print_ISBN
0-89791-903-3
Type
conf
Filename
621242
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