On the grain boundary barrier height and threshold voltage of undoped polycrystalline silicon thin-film transistors

Based on the surface potential calculation by the 1-D poisson´s equation, the grain boundary barrier height at channel surface is derived accurately assuming an exponential density of trap states (DOS) within the energy gap. The threshold voltage is defined as the gate voltage when the free charge density is equal to the trapped charge density at the surface of channel, corresponding to the depleted region width near the grain boundary is equal to one half of grain size. The grain size dependent threshold voltage is verified by the available experimental data. A new approach to extract the threshold voltage is also presented from the transconductance by the improvement on D. C. Moschou et al´s work.