DocumentCode
2276187
Title
Cycle simulation techniques
Author
Palnitkar, Samir ; Parham, Darrell
Author_Institution
Sun Microsystems Inc., Mountain View, CA, USA
fYear
1995
fDate
27-29 Mar 1995
Firstpage
2
Lastpage
8
Abstract
Nowadays most hardware design is being done at a high level of abstraction, such as a hardware description language. Hence, simulation constitutes a significant part of the design verification process. We study cycle simulation techniques that could potentially speed up simulation. Then we propose various metrics to predict the performance of a cycle based simulator which uses these cycle simulation techniques. A justification is provided as to why each metric is the best possible indicator of a certain characteristic of the design. Finally we summarize the results obtained from the analysis of various designs and draw inferences from them
Keywords
computer architecture; hardware description languages; software metrics; software performance evaluation; virtual machines; cycle simulation techniques; design verification process; hardware description language; hardware design; metrics; performance prediction; Analytical models; Clocks; Discrete event simulation; Hardware design languages; Inference algorithms; Predictive models; Process design; Sun; Timing; Wheels;
fLanguage
English
Publisher
ieee
Conference_Titel
Verilog HDL Conference, 1995. Proceedings., 1995 IEEE International
Conference_Location
Santa Cruz, CA
Print_ISBN
0-8186-7082-7
Type
conf
DOI
10.1109/IVC.1995.512462
Filename
512462
Link To Document