DocumentCode :
227682
Title :
High thermal conductivity underfill for the thermal management of three-dimensional (3D) chip stacks
Author :
Matsumoto, Kaname ; Mori, Hisamichi ; Orii, Y. ; Kiritani, Hideki ; Kawase, Y. ; Ikemoto, Makoto ; Yamazaki, M. ; Sugiyama, Masakazu ; Mizutani, Fumikazu
Author_Institution :
ICNOBIC, IBM Res. - Tokyo, Kawasaki, Japan
fYear :
2014
fDate :
9-13 March 2014
Firstpage :
219
Lastpage :
223
Abstract :
It has been experimentally clarified that one of the thermal resistance bottlenecks of a three-dimensional (3D) chip stack is interconnection (solder bumps and underfill) between stacked chips. High thermal conductivity underfill, which we call high thermal conductivity inter chip fill (ICF), is expected to reduce the thermal resistance of interconnection efficiently, because the area which is occupied by ICF is larger than solder bumps. It is shown by simulation how high thermal conductivity ICF contributes to decrease the thermal resistance of interconnection. Also material formulation of high thermal conductivity ICF is demonstrated.
Keywords :
integrated circuit interconnections; integrated circuit modelling; solders; thermal conductivity measurement; thermal management (packaging); thermal resistance measurement; three-dimensional integrated circuits; 3D chip stacks; solder bumps; thermal conductivity ICF; thermal conductivity interchip fill; thermal conductivity underfill; thermal management; thermal resistance; Conductivity; Heating; Thermal conductivity; Thermal management; Thermal resistance; Three-dimensional displays; Three; dimensional (3D) chip stack; high thermal conductivity underfill; inter chip fill (ICF); thermal resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), 2014 30th Annual
Conference_Location :
San Jose, CA
Type :
conf
DOI :
10.1109/SEMI-THERM.2014.6892243
Filename :
6892243
Link To Document :
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