Generic thermal modeling study of the impact of 3D -interposer material and thickness options on the thermal performance and die-to-die thermal coupling

In this paper, we present a generic modeling study of the interposer package thermal performance as a function of the interposer thermal properties and thickness for different temperature specifications. The modeling study is based on an extensive DOE of thermal finite element simulations that extract the maximum allowable logic power as a function of the interposer properties. A graphical representation of the modeling results of the thermal performance visualizes the trade-off between the self-heating of the logic chip and the thermal coupling to the memory chip for different interposer materials and thicknesses.