FPGA implementation of PN-sequence generator with binary chaos synchronization

Pseudo random sequences (PN-sequences) are widely used in communication systems. They are often generated by discrete time binary automata like the LFSR (linear feedback shift register). Chaotic maps were considered as an effective alternative for generating PN- sequences. One specific motivation for this choice is the theoretically infinite state space expected to produce infinitely long periods and the existence of the chaos synchronization properties which opens a novel perspective to otherwise complex and power consuming PN-acquisition schemes based on correlating the received sequence with a local reference.