Scale length determination of Gate all around (regular pentagonal cross section) fully depleted junction less transistor

Author

Sarma, Kaushik Chandra Deva ; Sharma, Shantanu

Author_Institution

Dept. of Electron. & Commun., CIT, Kokrajhar, India

fYear

2014

fDate

1-2 Aug. 2014

Firstpage

1

Lastpage

5

Abstract

This paper presents a method for scale length determination of a Gate all around (regular pentagonal cross section) fully depleted Junctionless transistor (JLT). The scale length expression is obtained by solving the 3D Poisson´s equation. Variation of scale length with gate oxide thickness, side length of pentagon and dielectric constant is shown. The Transverse electrostatic potential profile is also shown for different values of gate voltage, gate oxide thickness, side length of pentagon, channel length and drain voltage. The Central electrostatic potential profile is also shown for different values of gate oxide thickness, side length of pentagon, gate voltage and drain voltage.

Keywords

Poisson equation; electrostatics; field effect transistors; permittivity; 3D Poisson equation; JLT; central electrostatic potential profile; channel length; dielectric constant; drain voltage; gate all around fully depleted junction less transistor; gate oxide thickness; gate voltage; pentagon side length; regular pentagonal cross section fully depleted junction less transistor; scale length determination method; transverse electrostatic potential profile; Dielectrics; Logic gates; Silicon; JLT; Pentagonal Cross Section; Poisson´s equation; Scale length;

fLanguage

English

Publisher

ieee

Conference_Titel

Advances in Engineering and Technology Research (ICAETR), 2014 International Conference on

Conference_Location

Unnao

ISSN

2347-9337

Type

conf

DOI

10.1109/ICAETR.2014.7012831

Filename

7012831