A 1 Gs/s, 10b digital-to-analog converter

Author

Vorenkamp, P. ; Verdaasdonk, J. ; van de Plassche, R. ; Scheffer, D.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

1994

fDate

16-18 Feb. 1994

Firstpage

52

Lastpage

53

Abstract

At the 8b level, digital-to-analog converter (DAC) sampling rates exceeding 500 Ms/s have been reported. However, new application areas such as direct digital synthesis (DDS) and high-resolution graphics systems call for 10b to 12b linearity at sampling rates of 250 MHz and beyond. In a GaAs technology a 12b, 1 Gs/s DAC system has been implemented at the expense of a total power consumption of 3 W. This paper presents a differential DAC combining both 10b linearity with a 1 Gs/s sampling rate using only 730 mW from a single -4.5 V supply. The die is 5.0 mm/sup 2/.<>

Keywords

III-V semiconductors; digital-analogue conversion; frequency synthesizers; gallium arsenide; linear integrated circuits; monolithic integrated circuits; -4.5 V; 10 bit; 730 mW; GaAs; GaAs technology; differential DAC; digital-to-analog converter; direct digital synthesis; high-resolution graphics systems; linearity; sampling rates; total power consumption; Circuits; Decoding; Delay; Digital-analog conversion; Energy consumption; Latches; Linear code; Linearity; Resistors; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1994. Digest of Technical Papers. 41st ISSCC., 1994 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-1844-7

Type

conf

DOI

10.1109/ISSCC.1994.344730

Filename

344730