DocumentCode :
228798
Title :
Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems
Author :
Young Hoon Son ; Seongil, O. ; Hyunggyun Yang ; Daejin Jung ; Jung Ho Ahn ; Kim, Jung-Ho ; Jangwoo Kim ; Lee, Jae W.
Author_Institution :
Seoul Nat. Univ., Seoul, South Korea
fYear :
2014
fDate :
16-21 Nov. 2014
Firstpage :
1059
Lastpage :
1070
Abstract :
Through-Silicon Interposer (TSI) has recently been proposed to provide high memory bandwidth and improve energy efficiency of the main memory system. However, the impact of TSI on main memory system architecture has not been well explored. While TSI improves the I/O energy efficiency, we show that it results in an unbalanced memory system design in terms of energy efficiency as the core DRAM dominates overall energy consumption. To balance and enhance the energy efficiency of a TSI-based memory system, we propose μbank, a novel DRAM device organization in which each bank is partitioned into multiple smaller banks (or μbanks) that operate independently like conventional banks with minimal area overhead. The μbank organization significantly increases the amount of bank-level parallelism to improve the performance and energy efficiency of the TSI-based memory system. The massive number of μbanks reduces bank conflicts, hence simplifying the memory system design. We evaluated a sophisticated prediction-based DRAM page-management policy, which can improve performance by up to 20.5% in a conventional memory system without μbanks. However, a μbank-based design does not require such a complex page-management policy and a simple open-page policy is often sufficient -- achieving within 5% of a perfect predictor. Our proposed μbank-based memory system improves the IPC and system energy-delay product by 1.62× and 4.80×, respectively, for memory-intensive SPEC 2006 benchmarks on average, over the baseline DDR3-based memory system.
Keywords :
DRAM chips; storage management; μbank; DDR3-based memory system; DRAM page-management policy; I/O energy efficiency; IPC; TSI-based memory system; bank-level parallelism; energy consumption; main memory system architecture; memory-intensive SPEC 2006 benchmark; microbank; prediction-based DRAM; through-silicon interposer; Bandwidth; Data transfer; Decoding; Random access memory; Silicon; Substrates; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing, Networking, Storage and Analysis, SC14: International Conference for
Conference_Location :
New Orleans, LA
Print_ISBN :
978-1-4799-5499-5
Type :
conf
DOI :
10.1109/SC.2014.91
Filename :
7013073
Link To Document :
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