Industrially Proving the SPIRIT Consortium Specifications for Design Chain Integration

Author

Lennard, C.K. ; Berman, V. ; Fazzari, S. ; Indovina, M. ; Ussery, C. ; Strik, M. ; Wilson, James ; Florent, O. ; Remond, F. ; Bricaud, P.

Volume

2

fYear

2006

fDate

6-10 March 2006

Firstpage

1

Lastpage

6

Abstract

There has traditionally been significant engineering overhead required for the integration of multi-vendor tool and IP design methodologies. Making design-chain integration efficient is the key objective of the SPIRIT Consortium. This special session paper provides an insight into how the specifications of the SPIRIT consortium are being adopted in the industry today. We present 3 production design-flow stories which show improved efficiency gained through use of the SPIRIT consortium specifications. These include an IP generator for hierarchical VLIW processor design, a full hardware/software SoC integration design flow managed through generators, and methodology support for a flow from electronic system level (ESL) design through to the 65 nm CMOS process

Keywords

CMOS integrated circuits; hardware-software codesign; integrated circuit design; logic design; system-on-chip; 65 nm; CMOS process; IP design methodologies; IP generator; SPIRIT consortium specifications; SoC integration design; design chain integration; electronic system level design; hardware/software design; hardware/software integration; hierarchical VLIW processor design; multivendor tool; production design-flow;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2006. DATE '06. Proceedings

Conference_Location

Munich

Print_ISBN

3-9810801-1-4

Type

conf

DOI

10.1109/DATE.2006.243839

Filename

1657129