Title :
Characterization of two standard CMOS EEPROM designs
Author :
Snyder, Jan ; James, Timothy ; Bibyk, Steven
Abstract :
The objective of this project is to characterize the programming speed and the programming voltage requirements of floating gate EEPROM cells made in a generic CMOS process (e.g. a MOSIS tiny chip - AMI C5N 0.5 micron technology). The charge trapping and injection is based on carrier injection using cold tunneling (Fowler-Nordheim effect). The variable constraints are the sizes of the injector capacitors and control gate capacitors. All necessary positive voltages will be generated using a charge pump requiring a single power supply
Keywords :
CMOS memory circuits; EPROM; charge injection; integrated circuit design; tunnelling; 0.5 micron; AMI C5N technology; CMOS EEPROM design; Fowler-Nordheim effect; MOSIS chip; carrier injection; charge injection; charge pump; charge trapping; cold tunneling; control gate capacitor; floating gate cell; injector capacitor; programming speed; programming voltage; Ambient intelligence; CMOS process; CMOS technology; Capacitors; Charge pumps; EPROM; Power generation; Size control; Tunneling; Voltage;
Conference_Titel :
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-7150-X
DOI :
10.1109/MWSCAS.2001.986331
