DocumentCode
229164
Title
Modeling the temperature bias of power consumption for nanometer-scale CPUs in application processors
Author
DeVogeleer, Karel ; Memmi, Gerard ; Jouvelot, Pierre ; Coelho, Flavio
Author_Institution
LTCI, TELECOM ParisTech, Paris, France
fYear
2014
fDate
14-17 July 2014
Firstpage
172
Lastpage
180
Abstract
We introduce and experimentally validate a new macro-level model of the CPU temperature/power relationship within nanometer-scale application processors or system-on-chips. By adopting a holistic view, this model is able to take into account many of the physical effects that occur within such systems. Together with two algorithms described in the paper, our results can be used, for instance by engineers designing power or thermal management units, to cancel the temperature-induced bias on power measurements. This will help them gather temperature-neutral power data while running multiple instance of their benchmarks. Also power requirements and system failure rates can be decreased by controlling the CPU´s thermal behavior. Even though it is usually assumed that the temperature/power relationship is exponentially related, there is however a lack of publicly available physical temperature/power measurements to back up this assumption, something our paper corrects. Via measurements on two pertinent platforms sporting nanometer-scale application processors, we show that the power/temperature relationship is indeed very likely exponential over a 20°C to 85°C temperature range. Our data suggest that, for application processors operating between 20°C and 50°C, a quadratic model is still accurate and a linear approximation is acceptable.
Keywords
approximation theory; microprocessor chips; power aware computing; power measurement; CPU temperature/power relationship; linear approximation; macrolevel model; nanometer-scale CPUs; nanometer-scale application processors; power consumption; power management unit; power measurements; power requirements; quadratic model; system failure rates; system-on-chips; temperature 20 C to 85 C; temperature bias modeling; temperature-induced bias; temperature-neutral power data; thermal management unit; Computational modeling; Heating; Leakage currents; Program processors; Temperature distribution; Temperature measurement; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), 2014 International Conference on
Conference_Location
Agios Konstantinos
Type
conf
DOI
10.1109/SAMOS.2014.6893209
Filename
6893209
Link To Document