DocumentCode
2296589
Title
A new radix-6 FFT algorithm suitable for multiply-add instruction
Author
Takahashi, Daisuke
Author_Institution
Inf. Technol. Centre, Tokyo Univ., Japan
Volume
6
fYear
2000
fDate
2000
Firstpage
3343
Abstract
A new radix-6 FFT algorithm suitable for multiply-add instruction is proposed. The new radix-6 FFT algorithm requires fewer floating-point instructions than the conventional radix-6 FFT algorithms on processors that have a multiply-add instruction. We use Goedecker´s (1997) techniques to obtain an algorithm for computing radix-6 FFT with fewer floating-point instructions than conventional radix-6 FFT algorithms. The number of floating-point instructions for the new radix-6 FFT algorithm is compared with those of conventional radix-6 FFT algorithms on processors with multiply-add instruction
Keywords
digital arithmetic; fast Fourier transforms; signal processing; floating-point instructions; multiply-add instruction; radix-6 FFT algorithm; Arithmetic; Computer aided instruction; Costs; Fourier transforms; Information technology; Kernel; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 2000. ICASSP '00. Proceedings. 2000 IEEE International Conference on
Conference_Location
Istanbul
ISSN
1520-6149
Print_ISBN
0-7803-6293-4
Type
conf
DOI
10.1109/ICASSP.2000.860116
Filename
860116
Link To Document