Design and modeling of planar transformer-based silicon integrated passive devices for wireless applications

This paper presents design and modeling techniques for integrated passive devices (IPDs) that can be stacked with RF chips in a highly integrated three-dimensional IC for wireless applications. The research starts to study winding and modeling techniques for high-efficiency planar transformers. In an Above-IC process for silicon IPDs, the planar transformers realized can provide a passive efficiency as high as near 90%. Based upon the proposed and modeled high-efficiency planar transformers, the research explores novel planar transformer-based structures for various kinds of wireless passive components including baluns, bandpass filters and power combiners to achieve miniature size as well as high performance.