A 1.3 V, 65nm CMOS, coilless combined feedback LNA with integrated single coil notch filter

An LNA with integrated notch filter is demonstrated. It consists of a coilless two-stage LNA with capacitive feedback and an integrated Q-enhanced notch filter. Thus, this circuit is capable for use in FDD systems like UMTS or WCDMA without additional off-chip interstage filter, especially for highly integrated multi-band multi-standard transceivers as only one area consuming coil is used. At 100 Omega differential source impedance the LNA delivers 25.1 dB gain at a noise figure of 2.3 dB without filtering. For a desired RX-TX selectivity of 9 dB, a maximum gain of 21.8 dB with NF = 4.0 dB at 1730 MHz could be achieved. An inband IIP3 of -10.63 dBm, a half duplex IIP3 of -1.52 dBm and a double duplex IIP3 of +9.14 dBm were achieved. The RX gain compression due to a TX interferer increased from -23.5 dBm (w/o filter) to -20.5 dBm. The input reflection factor does not exceed S₁₁ = -10 dB while the LNA draws 16.6 mA and the notch filter additionally max. 4.1 mA from an 1.3 V supply voltage. The circuit was implemented on a 65 nm CMOS process.