DocumentCode :
230351
Title :
Flash-based nonvolatile programmable switch for low-power and high-speed FPGA by adjacent integration of MONOS/logic and novel programming scheme
Author :
Zaitsu, Koichiro ; Tatsumura, Kosuke ; Matsumoto, Morio ; Oda, Masaomi ; Fujita, S. ; Yasuda, Shuhei
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Kawasaki, Japan
fYear :
2014
fDate :
9-12 June 2014
Firstpage :
1
Lastpage :
2
Abstract :
Novel nonvolatile programmable switch for low-power and high-speed FPGA where MONOS flash is adjacently integrated to CMOS logic is demonstrated. The MONOS transistors (MTrs.) and low-voltage switching transistors (SwTrs.) are fabricated close to each other without deteriorating each performance. Furthermore, memory programming scheme is optimized to realize selective writing with no damage in the SwTrs. MONOS-based configuration memory has a half area of conventional SRAM, and it can be placed in each block in FPGA. That enables efficient power gating (PG) that offers low-power FPGA operation.
Keywords :
CMOS logic circuits; SRAM chips; field programmable gate arrays; flash memories; low-power electronics; CMOS logic; MONOS flash; MONOS transistors; MONOS-logic; SRAM; adjacent integration; flash-based nonvolatile programmable switch; high-speed FPGA; low-power FPGA; low-voltage switching transistors; memory programming scheme; power gating; Field programmable gate arrays; Logic gates; MONOS devices; Nonvolatile memory; Programming; Transistors; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
0743-1562
Print_ISBN :
978-1-4799-3331-0
Type :
conf
DOI :
10.1109/VLSIT.2014.6894355
Filename :
6894355
Link To Document :
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