DocumentCode :
230411
Title :
Spatial mapping of non-uniform time-to-breakdown and physical evidence of defect clustering
Author :
Wu, E.Y. ; Baozhen Li ; Stathis, James H. ; Linder, Barry ; Shaw, T.
Author_Institution :
Semicond. R&D Center, Syst. & Technol. Group, IBM, Essex Junction, VT, USA
fYear :
2014
fDate :
9-12 June 2014
Firstpage :
1
Lastpage :
2
Abstract :
For the first time, we report a spatial mapping methodology to directly obtain spatial BD distributions from TDDB data at wafer-scales. The results reveal BD defects are strongly clustered towards later stress times and explain the root-cause of non-Poisson area-scaling in agreement with recently developed time-dependent clustering model [3,4]. This methodology provides important detailed information for process diagnosis and improvement as well as realistic reliability assessment in future technologies as variability issues continue to rise.
Keywords :
electric breakdown; fault diagnosis; integrated circuit testing; pattern clustering; wafer-scale integration; BD defects; TDDB data; defect clustering; dielectric breakdown; nonPoisson area-scaling; nonuniform time-to-breakdown; process diagnosis; reliability assessment; spatial BD distributions; spatial mapping methodology; time-dependent clustering model; wafer-scales; Data models; Dielectric breakdown; Dielectrics; Graphical models; Leakage currents; Reliability; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
0743-1562
Print_ISBN :
978-1-4799-3331-0
Type :
conf
DOI :
10.1109/VLSIT.2014.6894386
Filename :
6894386
Link To Document :
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