In0.53Ga0.47As quantum-well MOSFET with source/drain regrowth for low power logic applications

Author

Zhou, Xiaoxin ; Alian, A. ; Mols, Y. ; Rooyackers, R. ; Eneman, Geert ; Lin, Dongyang ; Ivanov, T. ; Pourghaderi, Ali ; Collaert, Nadine ; Thean, A.

Author_Institution

Imec, Leuven, Belgium

fYear

2014

fDate

9-12 June 2014

Firstpage

1

Lastpage

2

Abstract

This paper reports In_0.53Ga_0.47As quantum-well MOSFET with source/drain regrowth for logic applications. For a device with L_g=100nm and EOT of 1.1nm, I_on=550μA/μm at 0.5V and fixed I_off=100nA/μm, peak g_m,ext=2.21mS/μm, and SS=82mV/dec at V_ds=0.5V are obtained. Minimum SS at V_ds=0.5V remains 80-87mV/dec for all gate lengths from 500nm to 75nm. To our knowledge, these are the best planar InGaAs-channel MOSFETs in literature. We attribute these advances to the improvement in epitaxy especially the InAlAs buffer, III-V/oxide interface engineering, and source/drain regrowth. A process has been developed to improve dielectric/III-V interface. The effects of EOT scaling on device performance are studied.

Keywords

III-V semiconductors; MOSFET; indium compounds; logic devices; low-power electronics; quantum well devices; semiconductor-insulator boundaries; EOT scaling; In_0.53Ga_0.47As; InAlAs; InP; dielectric-semiconductor interface; equivalent oxide thickness scaling; low power logic applications; planar channel MOSFET; quantum well MOSFET; source-drain regrowth; Benchmark testing; Dielectrics; Indium gallium arsenide; Indium phosphide; Logic gates; MOSFET; Metals;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014 Symposium on

Conference_Location

Honolulu, HI

ISSN

0743-1562

Print_ISBN

978-1-4799-3331-0

Type

conf

DOI

10.1109/VLSIT.2014.6894419

Filename

6894419