• DocumentCode
    231009
  • Title

    Parallel PCS interconnection current surge elimination technique using coupled inductor

  • Author

    Jung-Muk Choe ; Sun-Gil Ra ; Byeng-Joo Byen ; Gyu-Ha Choe

  • Author_Institution
    Dept. of Electr. Eng., Konkuk Univ., Seoul, South Korea
  • fYear
    2014
  • fDate
    Feb. 26 2014-March 1 2014
  • Firstpage
    524
  • Lastpage
    528
  • Abstract
    In this paper, coupled inductor method in parallel operation of PCS is proposed. In coupled inductor the primary and secondary currents flow in the same direction, the total flux total inductance is cancelled. However, when the currents flow in the opposite direction, each flux becomes an individual inductor. Aforementioned characteristic is adopted in parallel operation of PCS. Abnormal current is blocked by coupled inductor which is barred to connect grid code. A design guide is suggested by PCS´s capacity and the circulation current duration time. The proposed design is verified through the hardware implementation and experimental results that show the effectiveness of variance reduction.
  • Keywords
    load flow; power grids; power inductors; power system interconnection; abnormal current; circulation current duration time; coupled inductor; current surge elimination; grid code; parallel PCS interconnection; power conditioning systems; primary currents flow; secondary currents flow; variance reduction; Educational institutions; Inductance; Inductors; Inverters; Photovoltaic systems; Surges; Battery; Coupled Inductor; Photovoltaic; Power Conditioning System; Reconnection;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Technology (ICIT), 2014 IEEE International Conference on
  • Conference_Location
    Busan
  • Type

    conf

  • DOI
    10.1109/ICIT.2014.6894952
  • Filename
    6894952