A SOI CMOS Hall effect sensor architecture for high temperature applications (up to 300°C)

Author

Portmann, Lionel ; Ballan, Hussein ; Declercq, Michel

Author_Institution

Swiss Fed. Inst. of Technol., Lausanne, Switzerland

Volume

2

fYear

2002

fDate

2002

Firstpage

1401

Abstract

The design of a 5 V fully integrated magnetic sensor able to operate up to 270°C is presented. Fabricated in a Partially Depleted (PD) 1 μm SOI process, this monolithic sensor comprises a resistive Hall plate, an amplifier stage and an A/D converter delivering a temperature stabilized 8-bit digital readout of the magnetic field. This circuit uses analog techniques for continuous compensation of temperature. Design issues inherent to partially depleted SOI, as well as constraints due to high temperature, are discussed.

Keywords

CMOS analogue integrated circuits; Hall effect transducers; compensation; digital readout; high-temperature electronics; magnetic sensors; silicon-on-insulator; 1 micron; 300 degC; 5 V; 8 bit; A/D converter; ADC; Hall plate offset cancellation; SOI CMOS Hall effect sensor architecture; Si; amplifier stage; analog techniques; continuous temperature compensation; high temperature applications; integrated magnetic sensor; magnetic field; monolithic sensor; partially depleted SOI process; resistive Hall plate; temperature stabilized digital readout; Doping; Geometry; Hall effect devices; Low-frequency noise; Magnetic field measurement; Magnetic sensors; Switches; Temperature sensors; Thin film sensors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Sensors, 2002. Proceedings of IEEE

Print_ISBN

0-7803-7454-1

Type

conf

DOI

10.1109/ICSENS.2002.1037326

Filename

1037326