Low-Complexity Hyperspectral Image Compression on a Multi-tiled Architecture

The increasing amount of data produced in satellites poses a downlink communication problem due to the limited data rate of the downlink. This bottleneck is solved by introducing more and more processing power on-board to compress data to a satisfiable rate. This paper introduces an algorithm which has been developed to compress hyperspectral images at low complexity and describes its mapping to a new hardware platform called the Xentium. It is characterized by both high flexibility as well as high processing power. After introducing the algorithm the Xentium hardware is described. The different mapping strategies are explained and a cycle estimation is derived. It turns out that the compression algorithm can indeed be efficiently mapped on a reconfigurable tile like the Xentium. An image of 1024 times 1024 with 50 bands can be compressed in about 4 seconds on a single tile. Adding more tiles gives a close to linear speedup.