Title :
Adaptive Sub-Threshold Test Circuit
Author :
Turnquist, Matthew J. ; Laulainen, Erkka ; Makipaa, Jani ; Tenhunen, Hannu ; Koskinen, Lauri
Author_Institution :
Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo, Finland
fDate :
July 29 2009-Aug. 1 2009
Abstract :
Emerging ubiquitous systems such as distributed sensor networks require ultra-low power consumption. The energy minimum and thus, the lowest possible power consumption of CMOS logic, is achieved in the sub-threshold region. The exponential dependence of the drain current on threshold voltage variations leads to increased overdesign if sub-threshold circuits are to be robust. Adaptive systems are required to address variability robustness. One approach to achieve adaptivity is timing error detection (TED) within the circuit. Presented here is a TED latch capable of sub-threshold operation. It was designed in 65 nm technology, has an operating voltage range of 0.25 V through 1.2 V, and a minimum energy point (MEP) of 0.4 V. At the MEP, the average power consumption for one clock period and an activity factor of alpha=0.5 is 0.43 nW. The area of the TED latch is 101-um2. A sub-threshold CORDIC implementation is presented to demonstrate the TED latch at a system level.
Keywords :
CMOS logic circuits; circuit testing; timing circuits; CMOS logic; CORDIC; adaptive sub-threshold test circuit; adaptivity; complementary metal-oxide-semiconductor; distributed sensor network; drain current; threshold voltage; timing error detection latch; ubiquitous system; Adaptive systems; CMOS logic circuits; Circuit testing; Clocks; Energy consumption; Latches; Robustness; Sensor systems; Threshold voltage; Timing; low power; low voltage; sub-threshold; subthreshold; weak inversion;
Conference_Titel :
Adaptive Hardware and Systems, 2009. AHS 2009. NASA/ESA Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-0-7695-3714-6
DOI :
10.1109/AHS.2009.20