A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior

Author

Veldhorst, Paul ; Goksun, George ; Annema, Anne-Johan ; Nauta, Bram ; Buter, Berry ; Vertregt, Maarten

Author_Institution

Fac. of Electr. Eng., Math. & Comput., Univ. of Twente, Enschede, Netherlands

fYear

2009

fDate

14-18 Sept. 2009

Firstpage

464

Lastpage

467

Abstract

A 6-bit 1.2 Gs/s non-calibrated flash ADC in a standard 45 nm CMOS process, that achieves 0.45 pJ/conv-step at full Nyquist bandwidth, is presented. Power efficient operation is achieved by a full optimization of amplifier blocks, and by innovations in the comparator and encoding stage. The performance of a non-calibrated flash ADC is directly related to device properties; a scaling analysis of our ADC in and across CMOS technologies gives insight into the excellent usability of 45 nm technology for AD converter design.

Keywords

CMOS integrated circuits; Nyquist criterion; amplifiers; analogue-digital conversion; comparators (circuits); radio access networks; AD converter design; CMOS process; amplifier block optimization; comparator; encoding stage; full-Nyquist noncalibrated flash ADC; power efficient operation; power-efficient WPAN applications; scaling analysis; size 45 nm; storage capacity 6 bit; Bandwidth; CMOS technology; Calibration; Capacitance; Clocks; Differential amplifiers; Interpolation; Preamplifiers; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ESSCIRC, 2009. ESSCIRC '09. Proceedings of

Conference_Location

Athens

ISSN

1930-8833

Print_ISBN

978-1-4244-4354-3

Type

conf

DOI

10.1109/ESSCIRC.2009.5326002

Filename

5326002