Title :
Tests for resistive and capacitive defects in address decoders
Author :
Klaus, Matthias ; Van de Goor, Ad J.
Author_Institution :
PE Dept., ProMOS Technol., Hsinchu, Taiwan
Abstract :
Presents a complete analysis, at the electrical level, of address decoder faults caused by resistive opens, and by capacitive-coupling between address lines. Several authors have demonstrated the importance of this class of faults. New test conditions, and new march tests are derived to detect the resulting faults; and industrial results, applied to DRAMS, show the effectiveness of the new tests
Keywords :
DRAM chips; decoding; delays; fault diagnosis; integrated circuit testing; DRAMs; address decoders; address lines; capacitive defects; capacitive-coupling; decoder faults; march tests; resistive defects; resistive opens; test conditions; Bridges; Decoding; Delay; Electrical fault detection; Electronics industry; Information technology; Logic arrays; Random access memory; Semiconductor device testing; Wires;
Conference_Titel :
Test Symposium, 2001. Proceedings. 10th Asian
Conference_Location :
Kyoto
Print_ISBN :
0-7695-1378-6
DOI :
10.1109/ATS.2001.990255
