Title :
Testing multiple power connections with boundary scan
Author :
van de Lagemaat, D.
Author_Institution :
Philips Telecommun. & Data Syst., Hilversum
Abstract :
Boundary-scan techniques for testing multiple power connections on VLSI components are described. Power-connection testing issues during the several stages of a component´s life are considered, including IC design, IC production, PCB design, PCB assembly, and system use. The techniques developed involve the use of a RAM sense amplifier and a flip-flop sensor
Keywords :
VLSI; fault location; integrated circuit testing; logic testing; printed circuit testing; production testing; IC design; IC production; PCB assembly; PCB design; RAM sense amplifier; VLSI components; boundary scan; flip-flop sensor; multiple power connections; Assembly; Circuit testing; Clocks; Electronics packaging; Integrated circuit packaging; Integrated circuit technology; Pins; Power supplies; System testing; Very large scale integration;
Conference_Titel :
European Test Conference, 1989., Proceedings of the 1st
Conference_Location :
Paris
Print_ISBN :
0-8186-1937-6
DOI :
10.1109/ETC.1989.36233
