Title :
A tool set for the design of asynchronous circuits with bundled-data implementation
Author :
Iizuka, Minoru ; Hamada, Naohiro ; Saito, Hiroshi ; Yamaguchi, Ryoichi ; Yoshinaga, Minoru
Author_Institution :
Univ. of Aizu, Fukushima, Japan
Abstract :
This paper proposes a tool set for the design of asynchronous circuits with bundled-data implementation. Using the proposed tool set with commercial CAD tools, asynchronous circuits with bundled-data implementation can be designed easily. Through the experiments, this paper evaluates synthesized circuits using the proposed tool set in terms of area, performance, power consumption, and energy consumption comparing with synchronous counterparts.
Keywords :
asynchronous circuits; network synthesis; asynchronous circuit design; bundled-data implementation; commercial CAD tool; energy consumption; power consumption; synthesized circuit; tool set; Asynchronous circuits; Delay; Integrated circuit modeling; Registers; Solid modeling; Synchronization;
Conference_Titel :
Computer Design (ICCD), 2011 IEEE 29th International Conference on
Conference_Location :
Amherst, MA
Print_ISBN :
978-1-4577-1953-0
DOI :
10.1109/ICCD.2011.6081379
