Single-chip FEC codec using a concatenated BCH code for 10 Gb/s long-haul optical transmission systems

Author

Seki, K. ; Mikami, K. ; Katayama, A. ; Suzuki, S. ; Shinohara, N. ; Nakabayashi, M.

Author_Institution

NEC Corp., Kanagawa, Japan

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

279

Lastpage

282

Abstract

This paper describes a 10 Gb/s throughput FEC (forward error correction) codec for long-haul optical transmission systems. The FEC codec uses concatenated BCH(2040, 1930) and BCH(3860, 3824), which provides an excellent 7.98 dB net coding gain at 1E^-12 corrected bit error rate with 6.69% redundancy by applying three times iterative decoding. Furthermore, by applying a time-multiplexed decoder and skipping Chien search process for uncorrectable BCH(3860, 3824) codewords, the FEC codec achieves a low power consumption of 3.15 W and a low gate count of 2.40 Mgates using 0.15 μm CMOS technology.

Keywords

BCH codes; CMOS integrated circuits; codecs; concatenated codes; forward error correction; iterative decoding; optical communication equipment; 0.15 micron; 10 Gbit/s; 3.15 W; 7.98 dB; CMOS; coding gain; concatenated BCH code; corrected bit error rate; forward error correction codec; iterative decoding; long-haul optical transmission systems; redundancy; single-chip FEC codec; skipping Chien search process; time-multiplexed decoder; Bit error rate; CMOS technology; Codecs; Concatenated codes; Energy consumption; Forward error correction; Gain; Iterative decoding; Redundancy; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249403

Filename

1249403