Slow-wave phase shifter model and applications

Author

Lakshminarayanan, B. ; Weller, T.

Author_Institution

Dept. of Electr. Eng., South Florida Univ., Tampa, FL, USA

fYear

2005

fDate

2005

Abstract

A true time delay multi-bit MEMS phase shifter topology based on impedance-matched slow-wave CPW sections on a 500 μm, thick quartz substrate is presented. A semi-lumped model for the unit cell is derived and used in predicting the 4-bit phase shifter performance by cascading N-sections. Experimental data for a 4.6 mm long 4-bit device shows a maximum phase error of 5.5° and S₁₁ less than -21 dB from 1-50 GHz. This multi-bit phase shifter is used in an electronically tunable TRL calibration set. It is shown via calibration comparison method that the accuracy of the tunable TRL is close to a conventional multi-line TRL calibration. A maximum error bound of 0.14 at 50 GHz is validated using a 0.3 pF capacitor on CS-5 substrate and a 100 Ω load on GaAs substrate.

Keywords

UHF phase shifters; coplanar waveguides; impedance matching; micromechanical devices; microwave phase shifters; millimetre wave phase shifters; network topology; slow wave structures; 0.3 pF; 1 to 50 GHz; 4.6 mm; 500 mum; GaAs substrate; impedance-matched slow-wave CPW; multibit MEMS phase shifter topology; semilumped model; slow-wave phase shifter model; thick quartz substrate; true time delay phase shifter; Calibration; Capacitors; Coplanar waveguides; Delay effects; Gallium arsenide; Impedance; Micromechanical devices; Phase shifters; Predictive models; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless and Microwave Technology, 2005. WAMICON 2005. The 2005 IEEE Annual Conference

Print_ISBN

0-7803-8861-5

Type

conf

DOI

10.1109/WAMIC.2005.1528376

Filename

1528376