Energy minimization feedback loop for ripple carry adders

We present a technique and related system implementation for minimizing energy consumption in ripple carry adder blocks, and we show simulation results for the various system blocks. The method includes a tracking loop which measures the energy consumed by the load and controls, through a DC-DC converter, the supply voltage of the load. The energy consumption of the adder is calculated for a range of inputs in order to verify the efficiency of the tracking loop. Results corresponding to an 8-bit ripple carry adder show that energy savings of the order of 50%-100% are expected to be obtained when all the blocks of the circuit are running together. The system is simulated using HSPICE and Verilog-A.