• DocumentCode
    2353666
  • Title

    Variational interconnect analysis via PMTBR

  • Author

    Phillips, Joel R.

  • Author_Institution
    Cadence Berkeley Labs., San Jose, CA, USA
  • fYear
    2004
  • fDate
    7-11 Nov. 2004
  • Firstpage
    872
  • Lastpage
    879
  • Abstract
    We demonstrate an algorithm for interconnect modeling in the presence of process variation based on extension of the truncated balanced realization model reduction algorithm to multi-dimensional, parameter varying systems. Our scheme, based on a set of estimators of the variational TBR projection spaces, is simple to implement, contains embedded error estimators, and leads to nearly optimally sized models.
  • Keywords
    circuit simulation; integrated circuit interconnections; integrated circuit modelling; reduced order systems; PMTBR; embedded error estimators; interconnect modeling; multidimensional parameter varying systems; optimally sized models; process variation; truncated balanced realization model reduction algorithm; variational TBR projection spaces; variational interconnect analysis; Algorithm design and analysis; Dielectrics; Equations; Fabrication; Geometry; Integrated circuit interconnections; Laboratories; Power system interconnection; Power system modeling; Reduced order systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-8702-3
  • Type

    conf

  • DOI
    10.1109/ICCAD.2004.1382697
  • Filename
    1382697