Predicting microarchitectural power using Interval Based Hierarchical Support Vector Machine

Microarchitectural design involves exploring an exponentially large design space in order to determine an optimal configuration for a number of hardware parameters. Determining a particular combination of these parameters which lead to low power consumption can be daunting. New configurations must be tested on software simulators using benchmark programs which typically take a considerable amount of time to run. In this paper we present Interval Based Hierarchical Support Vector Machine (IBH-SVM) for identifying optimal power aware combinations of microarchitectural parameters from this exponentially large design space. The advantage of this formulation is twofold in that it accurately and efficiently finds power aware configurations while considerably decreasing the number of software benchmark simulations needed to select the most appropriate configurations. The reduction in power is not only in terms of the savings on future applications run on these processors, but also on the testing time required during the design phase since suboptimal configurations are ignored early on.